1. Field of the Invention
The present invention relates to an apparatus for manufacturing a liquid crystal display (LCD) device and more particularly, to a method of forming an electrode for an array substrate of the LCD device in a dry etching apparatus.
2. Discussion of the Related Art
Generally, a liquid crystal display (LCD) device has an upper substrate and a lower substrate, which are spaced apart and facing each other, and liquid crystal disposed between the upper and lower substrates. Each of the substrates includes an electrode and the electrodes of each substrate are also facing each other. The LCD device uses an optical anisotropy of liquid crystal and produces an image by controlling light transmissivity by varying the arrangement of liquid crystal molecules, which are arranged by an electric field.
A conventional liquid crystal display (LCD) device will be described hereinafter more in detail with reference to FIG. 1. FIG. 1 is an exploded perspective view illustrating a conventional LCD device. The conventional LCD device 11 has upper and lower substrates 5 and 22, which are spaced apart and facing each other, and also has a liquid crystal 14 to be interposed between the upper substrate 5 and the lower substrate 22. The liquid crystal 14 has positive or negative dielectric anisotropy.
A gate line 13 is formed horizontally (in the context of the figure) on the inside of the lower substrate 22 and a data line 15 is also formed vertically (in the context of the figure) on the inside of the lower substrate 22. The gate line 13 and the data line 15 cross each other to define a pixel area “P”. A thin film transistor “T” is situated at the crossing of the gate line 13 and the data line 15. A pixel electrode 17, which is connected to the thin film transistor “T”, is formed in the pixel area “P”. The pixel electrode 17 is made of a transparent conductive material like Indium-Tin-Oxide (ITO) or Indium Zinc Oxide (IZO).
Next, a black matrix 6, which has an opening corresponding to the pixel electrode 17, is formed on the inside of the upper substrate 5. A color filter 7 corresponding to the opening of the black matrix 6 is formed on the black matrix 6. The color filter 7 includes three colors: red (R), green (G) and blue (B). Each color corresponds to a respective pixel electrode 17. Subsequently, a transparent common electrode 18 is formed on the color filter 7.
In the conventional LCD device of FIG. 1, when a voltage is applied to the pixel electrode 17 and the common electrode 18, an electric field is induced between the pixel electrode 17 and the common electrode 18 in a direction perpendicular to the upper and lower substrates 5 and 22. Molecules of the liquid crystal 14 are arranged by the electric field and light is emitted through the arranged liquid crystal 14 from a back light (not shown) disposed below the conventional LCD device, so that pictures are displayed.
However, as this conventional LCD device has a narrow viewing angle, LCD devices having a wide viewing angle have been researched and developed. An in-plane switching (IPS) mode LCD device is one of the wide viewing angle LCD devices. In the in-plane switching (IPS) mode LCD device, a pixel electrode and a common electrode are formed on the same substrate, and thus an electric field is induced in a direction parallel with the substrates of the in-plane switching (IPS) mode LCD device.
FIG. 2 is a plan view illustrating an array substrate of the in-plane switching (IPS) mode LCD device according to the prior art. As shown in FIG. 2, in the array substrate of the conventional in-plane switching mode LCD device, a gate line 32 of a horizontal direction and a data line 44 of vertical direction cross each other and define a pixel region “P”. The gate line 32 and the data line 44 are made of a metal material, especially having relatively low resistivity. A thin film transistor “T”, i.e. a switching device, is formed at the crossing of the gate line 32 and the data line 44. The thin film transistor “T” includes a gate electrode 34, a source electrode 46, a drain electrode 48 and an active layer 40. The gate electrode 34, which may be a part of the gate line 32, is connected to the gate line 32 and the source electrode 46 is connected to the data line 44. The source and drain electrodes 46 and 48 are apart from each other at regular intervals and overlap the gate electrode 34.
A common line 36 and three common electrodes 37 are formed in the pixel region “P”. The common line 36 is formed horizontally (in the context of the figure), i.e. in parallel with the gate line 32, and the common electrodes 37 extend vertically (in the context of the figure) from the common line 36. Each common electrode 37 includes a first vertical part 37a, which is located between the one gate line 32 and the common line 36, and a second vertical part 37b, which is disposed between the common line 36 and the other gate line 32. Also, a pixel electrode 50 is formed in the pixel region “P”. The pixel electrode 50 includes two vertical parts 50a parallel with the common electrodes 37 and a horizontal part 50b connecting two vertical parts 50a. The horizontal part 50b of the pixel electrode 50 overlaps the gate line 32, so that the horizontal part 50b and the overlapped gate line 32 form a storage capacitor “Cst”. One of the vertical parts 50a of the pixel electrode 50 is connected to the drain electrode 48. The common electrodes 37 and the vertical parts 50a of the pixel electrode 50 have an alternating arrangement. Some of the common electrodes 37 also lie near the data line 44, and the common electrodes are spaced apart from each other. Here, the common electrodes 37 may be formed of the same material as the gate line 32, and the pixel electrode 50 may be made of the same material as the data line 44.
In the above-mentioned array substrate, each element is formed using a photolithographic process. The photolithographic process includes steps of depositing a thin film, coating a photo-resist material, exposing the photo-resist to a light, developing the photo-resist, and etching the thin film. A method of etching the thin film is classified into two types: wet etching and dry etching. The wet etching utilizes chemical solvents, and the dry etching utilizes plasma to eliminate a part of the thin film. More recently, the dry etching method is widely used due to short processing time and good selectivity.
FIG. 3 illustrates a conventional apparatus for dry etching. As shown in the figures, the dry etching apparatus 60 includes a chamber 62, which has a gas injecting hole 68a and a pumping port 68b. The gas injecting hole 68a is disposed at the top surface of the chamber 62, and the pumping port 68b is located at the bottom surface of the chamber 62. The gas injecting hole 68a is a path for reactive gas for the etching, and the pumping port 68b is an outlet for air in the chamber 60.
Within the chamber 62, an upper electrode 64 and a lower electrode 66 are disposed facing apart from each other. The upper electrode 64 is grounded, and high frequency power is applied to the lower electrode 66. The lower electrode 66 has a pinhole 73. A pin 72, which moves a substrate 70 thereon up and down, is disposed in the pinhole 73. The substrate 70, which includes a thin film to be etched, is located on the pin 72.
Dry etching using the above-mentioned apparatus, especially reactive ion etching method, will be described. First, the substrate 70 including a thin film (not shown) thereon is situated over the lower electrode 66, more particularly on the pin 72, and the air in the chamber 62 is exhausted out of the chamber 62 through the pumping port 68b. Then, etching gas to remove a part of the thin film (not shown) is injected into the chamber 62 through the gas injecting hole 68a. Thereafter, when a high frequency power is applied to the lower electrode 66, molecules of the etching gas are excited due to the energy of the power, and reactive species, for example atoms, radicals, and ions, are generated in plasma between the upper electrode 64 and the substrate 70. The reactive species react with the material of the thin film (not shown), and the thin film (not shown) on the substrate 70 is etched. By the way, when the array substrate of the IPS mode LCD device is manufactured by using the apparatus of FIG. 3, spots can be observed in the IPS mode LCD. Causes of these spots being created will be described.
FIG. 4 is a plan view illustrating an IPS mode LCD device formed by a conventional dry etching method. As illustrated in FIG. 4, a substrate 679 mm long and 590 mm wide is used for manufacturing a liquid crystal display panel 80 of the IPS mode LCD device. Two IPS mode LCD devices can be formed of the above-sized substrate. An array substrate (not shown) of the liquid crystal display panel 80 is manufactured by using the dry etching apparatus of the FIG. 3. Here, several series of spots 82 are observed in the liquid crystal display panel 80 of the IPS mode LCD device, but are not found in a normal mode LCD device such as a twisted nematic mode LCD device. The series of spots 82 appears in a horizontal direction and each series of spots 82 is spaced apart from each other by a distance about 50 mm vertically.
FIG. 5 is a plan view illustrating a part of a lower electrode of a conventional dry etching apparatus shown in FIG. 3. In FIG. 5, a lower electrode 66 of a conventional dry etching apparatus is covered with an oxidized film 86. The oxidized film 86 prevents the lower electrode 66 from reacting with reactive species. A plurality of vertical lines 84 are projecting parts of the upper surface of the lower electrode 66 of the conventional dry etching apparatus. Each vertical line 84 is spaced apart from each other at about 50 mm intervals, which correspond to the distance between the series of spots 82 of FIG. 4. Here, the array substrate (not shown) of the liquid crystal display panel 80 of FIG. 4 rotates in a 90-degree arc and is disposed on the lower electrode 66 of FIG. 5. Then, dry etching is accomplished.
Generally, the lower electrode 66 of the conventional dry etching apparatus is manufactured in milling, polishing, and anodizing processes. The milling is a process cutting a metal plate and includes roughing, rest roughing and finishing steps. The polishing is a process that makes the surface of the lower electrode 66 smooth by rubbing, and the anodizing is to oxidize the surface of the lower electrode 66.
FIG. 6 illustrates a milling process of a lower electrode of a conventional dry etching apparatus and more particularly, shows a roughing process or a rest roughing process. FIGS. 7A and 7B illustrates a finishing process of the lower electrode of the conventional dry etching apparatus.
In FIG. 6, a miller (not shown), which is 50 mm in diameter, moves vertically in the context of the figure to define a first arc 90a. At this time, friction is produced between the miller and the upper surface of the lower electrode 66, and thus the upper surface of the lower electrode 66 contacting the miller is cut. Subsequently, the miller is shifted and also moves vertically in the context of the figure to define a second arc 90b in the neighboring region of the first arc 90a. Repeating this process in the next region, the upper surface of the lower electrode 66 is entirely cut. By the way, protrusions about 1 mm in width are formed between the arcs, for example a protrusion “A” between the first arc 90a and the second arc 90b. The protrusions “A” are spaced apart from each other at about 50 mm intervals.
Next, as shown in FIGS. 7A and 7B, a finishing process causes the surface of the lower electrode uniform. However, a hollow “B” may be formed on the surface of the lower electrode 66 due to particles 96 on the surface of a polishing roller 94, wherein the particle 96 is created in the above process of FIG. 6.
Therefore, it is difficult to compensate for these protrusions “A” of FIG. 6 and hollow “B” of FIG. 7B by polishing, the next process of the above processes, and to set roughness and flatness of the surface of the lower electrode.
FIGS. 8A and 8B illustrate a conventional lower electrode 66 and a substrate 70 thereon. FIG. 8A is a perspective view the conventional lower electrode, and FIG. 8B is a cross-sectional view along a line VIIIB—VIIIB of FIG. 8A. In the figures, a substrate 70 to be etched is situated on a lower electrode 66 of a conventional dry etching apparatus, wherein the lower electrode 66 is formed by the above processes of FIGS. 6, 7A and 7B. As stated above, the lower electrode 66 has a plurality of protrusions 84 spaced apart by about 50 mm. Therefore, as shown in FIG. 8B, the substrate 70 contacts points “C” corresponding to the protrusions 84, while the substrate 70 does not contact points “D”, each of which is the middle point between the points “C” and is sunken.
During an etching process, the temperature of the substrate 70 contacting the points “C” falls by about 50 degrees Celsius. On the other hand, the temperature of the substrate 70 corresponding to the points “D” rises. Therefore, the substrate 70 contacting the points “C” is over-etched more than the substrate 70 corresponding to the points “D”. The etched surface of the substrate 70 is not uniform and critical dimension is shortened. This difference of the critical dimensions causes irregular layers on the etched substrate 70. Thus, spots show in an IPS mode LCD device, which has several patterns in a pixel region.